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Glossary
A
ADC - Analog to Digital Converter
Definition: a unit that takes analog signals and converts them to digital. Commonly incorporated in MCUs. Sometimes abbreviated as A/D
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ATM - Asynchronous Transfer Mode
ASIC - Application Specific Integrated Circuit
B
Bipolar
See: Bipolar junction transistor
BJT - Bipolar junction transistor
Definition: 3-terminal transistor, NPN or PNP. Current controlled-current source
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BiCMOS
Definition: combining BJTs and CMOS technology on the same device (die) Pentium, Pentium Pro, and SuperSPARC used BiCMOS
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Carry look-ahead adder
Definition: faster binary adder that looks ahead instead of rippling through the bits
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CAN - Controller-area network
Chipset
Definition: group of chips designed to work with a CPU to preform basic functions such as bus interfaces
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Chip package
Definition: The container that holds the integrated circuits die, wire-bound to the pins
AKA: chip carrier, chip container
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CPU - Central Processing Unit
Definition: a chip or (rarely) a collection of chips that preforms the processing of data for a computer. On microcontroller the CPU is a portion of the chip that does the computations or processing of data.
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Core, ie Processor Core
Definition: the portion of the chip that is defined as the processing unit. Multi-core CPUs have multiply processing unit
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DAC - Digital to Analog Converter
Definition: Unit used to output analog signals from digital signals. Sometimes used in MCUs
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Die
Definition: The actual silicon integrated circuit inside the chip package
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DRAM - Dynamic random access memory
Definition: Memory that stores each bit in a capacitor, which needs to be refreshed or it will lose it data.
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DMA - Direct memory access
DMOS - Double-Diffused Metal-Oxide-Semiconductor
Embedded system
Definition: A computer system design for a specific operation, unlike general purpose computers like desktop computers, or servers
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EPROM - Erasable Programmable Read-Only Memory
Definition: ROM that can be reprogrammed, usually erased using UV light. See UV-EPROM
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EEPROM - Electronically Erasable Programmable Read-Only Memory
Definition: EPROM that can be erased using electricity, not UV light. Sometimes in circuit, which is much easier and more practical than UV-EPROMs. Flash is a type of EEPROM.
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ECC - Error Correction Code
Definition: A type of coding by adding redundancy to data for error correction.
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FPU - Floating Point Unit
Definition: a separate unit for preforming floating point operation, as separate chip, sometimes a separate unit on the processor and included in the instruction set. Sometimes a co-processor is referred to as an FPU, even if its math operations are not all floating point
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FPGA - Field Programmable Gate Array
Definition: Programmable logic chip, the most complex and expensive programmable logic chip, generally used for development.
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GPIO - General Purpose Input/Output
Definition: pins that can be assigned input or output and be used for any reason
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G.Lite
HDLC - High-Level Data Link Control
HMOS - High-preformance NMOS or high-speed NMOS
Definition: Depletion load NMOS logic gates, for higher speed and lower power consumption
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Hsync - Horizontal Synchronization
Definition: has to do with synchronizing display on a CRT monitor or TV
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Hyper-threading
ISA - Instruction Set Architecture
Definition: Processor's architecture defined by a standard Instruction Set
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Interrupt
I/O - Input/Output
Definition: IC pins can designated as input or output or in some cases bidirectional, allowing input and output on the same pin
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I2C or I2C - Inter-Integrated Circuit
Definition: a popular serial communication protocol, pronounced "I squared C"
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JTAG
Definition: a communications protocol commonly used for debugging and programing devices
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L1 cache - Level 1 cache
Definition: the first level of cache memory, used for data and program code, sometimes shared, sometimes separate memory for each. Generally small in size, but is fast running at the speed of the processor. Data cache is in Bytes or Kilobytes. Instruction cache is Instructions or Kilo-instructions, size depending on the width of instructions.
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L2 cache - Level 2 cache
Definition: Shared data and instruction memory, larger in size to L1 cache but slower
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L3 cache - Level 3 cache
Definition: Shared data and instruction memory, very larger in size, but slower than L2 cache, rarely used except in servers
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NMOS [logic]
Definition:logic gates made from all N-channel MOSFETs, with a NMOS load
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MCU - Micro-Controller Unit
Definition: a chip that contains a CPU and other support functions designed to reduce the number of needed external components, and simplify users ability to preform tasks. MCUs commonly have on-chip RAM, ROM, timers, and clock generators. Other common functions are PWM, ADC, and SPI
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MMU - Memory Management Unit
Definition: unit responsible for handling accesses to memory requested by the CPU
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MMX
Definition: extension to x86 instruction set, adding single instruction, multiple data (SIMD) instructions
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OSD - On Screen Display
OTP [ROM] - One Time Programmable
Definition: ROM that can be written only once, one type is fuse-programmable ROM
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PAL - Programmable Array Logic
Definition: A programmable logic chip, to replace a bunch of logic gates and registers. One time programmable (OTP). The simplest of programmable logic, similar to CPLDs and FPGAs.
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Parity
Definition: A very simple type of coding by adding redundancy to data for error correction.
Wikipedia article
PWM - Pulse Width Modulator
Definition: a unit that outputs a clock signal with a constant period, and its on-time is controlled by the input. Commonly used in MCUs.
Wikipedia article
PCI
PCMCIA
PIO - Programmer Input/Output
Definition: A method of transferring data between the CPU and peripheral device.
Wikipedia article
PLL - Phase-Locked Loop
Definition: a type of feedback loop to generate stable oscilations for signal generation and recovery.
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PMOS [logic]
Definition: logic gates made from all P-channel MOSFETs, with a PMOS load
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PMMU - Paged Memory Management Unit
Definition: unit responsible for handling accesses to memory requested by the CPU
Wikipedia article
PPU - Picture Processing Unit
Definition: the name used by Nintendo for the Graphics Processing Unit (GPU) in the Nintendo and Super Nintendo
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Prescaler
RS-232
Definition: standard serial communications protocol, used in computer serial ports
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RS-432
RS-485
SCI - Serial Communication Interface
Servo - Servomechanism
SIMD - Single Instruction, Multiple Data
Definition: processor instruction that preforms the same operation on the multiple data sets in parallel
AKA: vector instructions
Wikipedia article
SPI - Serial Peripheral Interface
SoC - System on Chip
Definition: Combination of many components on a single chip (die), components which traditionally have their own individual chips. Geode is a SoC, with integrated CPU, chipset, and video controller
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Socket
SRAM - Static RAM
Definition: stores data in memory that does not need to be refreshed
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SSE - Streaming SIMD Extensions
Definition: an extension to the x86 instruction set, to preform single instruction, multiple data (SIMD) operation. SSE, SSE2, SSE3, and SSE4 are all added extensions
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SSSE3 - Supplemental Streaming SIMD Extension 3
Sync processor
Definition: unit that generates Vsync and Hsync signals for the display of a CRT monitor or TV
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UART - Universal asynchronous receiver/transmitter
Definition: Serial communications device, used in combination with a communications protocol such as RS-232
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Utopia
Vacuum fluorescent display
Definition: an illuminated display used in equipment such as video cassette recorders, car radios, and microwave ovens.
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Vcc
Definition: positive supply voltage. historically for analog (bipolar) devices. Vdd is used for digital (FET), but Vcc has been used for both
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Vsync - Vertical Synchronization
Definition: has to do with synchronizing display on a CRT monitor or TV
Wikipedia article
Watchdog timer
Definition: a timer that preforms a reset if the main program freezes
Wikipedia article
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